International Journals

M. Kaneko and T. Kimoto, “High-Temperature Operation of n- and p-Channel JFETs Fabricated by Ion Implantation Into a High-Purity Semi-Insulating SiC Substrate”, IEEE Electron Device Lett., 39, 723 (2018).

H. Tanaka, J. Suda, and T. Kimoto, “Impacts of energy relaxation process on quasi-ballistic hole transport capability in germanium and silicon nanowires”, J. Appl. Phys., 123, 024305 (2018).

M. Kaneko, S. Ueta, M. Horita, T. Kimoto, and J. Suda, “Deep-ultraviolet light emission from 4H-AlN/4H-GaN short-period superlattice grown on 4H-SiC (11-20)”, Appl. Phys. Lett., 112, 012106 (2018).

N. Sawada, T. Narita, M. Kanechika, T. Uesugi, T. Kachi, M. Horita, T. Kimoto, and J. Suda, “Sources of carrier compensation in metalorganic vapor phase epitaxy-grown homoepitaxial n-type GaN layers with various doping concentrations”, Appl. Phys. Exp., 11, 041001 (2018).

K. Kanegae, M. Kaneko, T. Kimoto, M. Horita, and J. Suda, “Characterization of carrier concentration and mobility of GaN bulk substrates by Raman scattering and infrared reflectance spectroscopies”, Jpn. J. Appl. Phys., 57, 070309 (2018).

H. Tanaka, S. Asada, T. Kimoto, and J. Suda, “Theoretical analysis of Hall factor and hole mobility in p-type 4H-SiC considering anisotropic valence band structure”, J. Appl. Phys., 123, 245704 (2018).

S. Asada, J. Suda, and T. Kimoto, “Analytical formula for temperature dependence of resistivity in p-type 4H-SiC with wide-range doping concentrations”, Jpn. J. Appl. Phys., 57, 088002 (2018).

K. Kanegae, M. Horita, T. Kimoto, and J. Suda, “Accurate method for estimating hole trap concentration in n-type GaN via minority carrier transient spectroscopy”, Appl. Phys. Express, 11, 071002 (2018).

T. Maeda, T. Narita, M. Kanechika, T. Uesugi, T. Kachi, T. Kimoto, M. Horita, and J. Suda, “Franz-Keldysh effect in GaN p-n junction diode under high reverse bias voltage”, Appl. Phys. Lett., 112, 252104 (2018).

S. Asada, J. Suda, and T. Kimoto, “Impacts of Finger Numbers on ON-State Characteristics in Multi-Finger SiC BJTs with Low Base Spreading Resistance”, IEEE Trans. on Electron Devices, 65, 2771-2777 (2018).

T. Maeda, X. Chi, M. Horita, J. Suda, and T. Kimoto, “Phonon-assisted optical absorption due to Franz-Keldysh effet in 4H-SiC p-n junction diode under high reverse bias voltage”, Appl. Phys. Express, 11, 091302 (2018).

T. Kimoto, H. Niwa, T. Okuda, E. Saito, Y. Zhao, S. Asada, and J. Suda, “Carrier lifetime and breakdown phenomena in SiC power device material”, J. Phys. D: Appl. Phys., 51, 363001 (2018).

M. Kato, S. Katahira, Y. Ichikawa, S. Harada, and T. Kimoto, “Observation of carrier recombination in single Shockley stacking faults and at partial dislocations in 4H-SiC”, J. Appl. Phys., 124, 095702 (2018).

T. Umeda, G.-W. Kim, T. Okuda, M. Sometani, T. Kimoto, and S. Harada, “Interface carbon defects at 4H-SiC(0001)/SiO₂ interfaces studied by electron-spin-resonance spectroscopy”, Appl. Phys. Lett., 113, 061605 (2018).

Y. Tokuda, I. Kamata, T. Miyazawa, N. Hoshino, T. Kato, H. Okumura, T. Kimoto, and H. Tsuchida, “Glide velocities of Si-core partial dislocations for double-Shockley stacking fault expansion in heavily nitrogen-doped SiC during high-temperature annealing”, J. Appl. Phys., 124, 025705 (2018).

K. Tachiki, T. Ono, T. Kobayashi, H. Tanaka, and T. Kimoto, “Estimation of threshold voltage in SiC short-channel MOSFETs”, IEEE Trans. on Electron Devices, 65, 3077-3080 (2018).

Y. Ichikawa, M. Ichimura, T. Kimoto, M. Kato, “Passivation of surface recombination at the Si-face of 4H-SiC by acidic solutions”, ECS J. Solid State Sci. and Tech., 7, Q127-Q130 (2018).

T. Okuda, T. Kimoto, and J. Suda, “A comparative study on electrical characteristics of 1-kV pnp and npn SiC bipolar junction transistors”, Jpn. J. Appl. Phys., 57, 04FR04 (2018).

S. Mori, M. Aketa, T. Sakaguchi, H. Asahara, T. Nakamura, and T. Kimoto, “Suppression of punch-through current in 3 kV 4H-SiC reverse-blocking MOSFET by using highly doped drift layer”, IEEE J. Electron Devices Society, 6, 449-453 (2018).

T. Kimoto and Y. Yonezawa, “Current status and perspectives of ultrahigh-voltage SiC power devices” (invited review), Mat. Sci. Semi. Processing, 78, 43-56 (2018).

T. Tawara, S. Matsunaga, T. Fujimoto, M. Ryo, M. Miyazato, T. Miyazawa, K. Takenaka, M. Miyajima, A. Otsuki, Y. Yonezawa, T. Kato, H. Okumura, T. Kimoto, and H. Tsuchida, “Injected carrier concentration dependence of the expansion of single Shockley-type stacking faults in 4H-SiC PiN diodes”, J. Appl. Phys., 123, 025707 (2018).

Y. Nishi, H. Sasakura, and T. Kimoto, “Conductance fluctuation in NiO-based resistive switching memory”, J. Appl. Phys., 124, 152134 (2018).

S. Asada, J. Suda, and T. Kimoto, “Determination of Surface Recombination Velocity From Current–Voltage Characteristics in SiC p-n Diodes”, IEEE Trans. on Electron Devices, 65, 4786-4791 (2018).

M. Arahata, Y. Nishi, and T. Kimoto, “Effects of TiO₂ crystallinity and oxygen composition on forming characteristics in Pt/TiO₂/Pt resistive switching cells”, AIP Advances, 8, 125010 (2018).

T. Kobayashi, Y. Matsushita, T. Okuda, T. Kimoto, and A Oshiyama, “Microscopic mechanism of carbon annihilation upon SiC oxidation due to phosphorus treatment: Density functional calculations combined with ion mass spectrometry”, Appl. Phys. Express, 11, 121301 (preprint: arXiv:1703.08063 [cond-mat.mtrl-sci]) (2018).

Conference Proceedings

S. Asada, J. Suda, and T. Kimoto, “Effects of Parasitic Region in SiC Bipolar Junction Transistors on Forced Current Gain”, Material Science Forum, 924, 629 (2018).

International Presentations

Y. Nishi and T. Kimoto, “Distribution of Forming Characteristics in NiO-Based Resistive Switching Cells with Two Kinds of NiO Crystallinity”,
2018 Mater. Res. Soc. Sympo. Spring Meeting (Phoenix, USA, 2018), EP01.07.03.

R. Matsui, Y. Kuriyama, Y. Nishi, and T. Kimoto, “Resistance Increase by Overcurrent Suppression in Forming Process in Pt/TiO₂/Pt Cells”,
2018 Mater. Res. Soc. Sympo. Spring Meeting (Phoenix, USA, 2018), EP01.07.05.

T. Maeda, M. Okada, M. Ueno, Y. Yamamoto, T. Narita, M. Kanechika, T. Uesugi, T. Kachi, T. Kimoto, M. Horita, and J. Suda, “Franz-Keldysh effect in GaN Schottky barrier diodes and p-n junction diodes under high reverse bias voltage”,
60th Electronic Materials Conference (University of California, Santa Barbara, USA, 2018), #B03.

T. Maeda, M. Okada, M. Ueno, Y. Yamamoto, T. Kimoto, M. Horita, and J. Suda, “Temperature dependence of barrier height in Ni/n-GaN Schottky barrier diode consistently obtained by C-V, I-V and IPE measurements”,
Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices 2018 (Kitakyusyu, Japan, 2018), A7-3.

K. Kanegae, M. Horita, T. Kimoto, and J. Suda, “Measurement of H1 trap concentration in MOVPE-grown homoepitaxial n-type GaN by optical isothermal capacitance transient spectroscopy using sub-bandgap photoexcitation”,
Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices 2018 (Kitakyusyu, Japan, 2018), A7-4.

K. Kanegae, M. Horita, T. Kimoto, and J. Suda, “Accurate estimation of H1 trap concentration in n-type GaN layers”,
International Symposium on Growth of Ⅲ-Nitrides (Warsaw, Poland, 2018), Tu4.4.

A. Iijima and T. Kimoto, “Theoretical and experimental investigation of critical condition for expansion/contraction of a single Shockley stacking fault in 4H-SiC”,
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), MO.04.02.

X. Chi, H. Niwa, Y. Nishi and T. Kimoto, “Tunneling current in 4H-SiC p-n junctions at high electric field”,
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), MO.P. FP11.

K. Ito, T. Kobayashi, M. Horita, J. Suda, and T. Kimoto, “Modeling of Electron Trapping in SiC MOSFETs Considering Interface-State-Density Distribution Extracted from Gate Characteristics”,
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), MO.P.MI6.

T. Kobayashi, K. Tachiki, K. Ito, Y. Matsushita, T. Kimoto, “Reduction of interface state density in SiC (0001) MOS structures by very-low-oxygen-partial-pressure annealing”,
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), TU.01a.05.

T. Maeda, X. Chi, M. Horita, J. Suda, and T. Kimoto, “Photocurrent induced by Franz-Keldysh effect in a 4H-SiC p-n junction diode under high reverse bias voltage”,
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), TU.02b.2.

S. Asada, J. Suda, T. Kimoto, “Impacts of finger numbers on forced current gain in multi-finger 10 kV-class SiC bipolar junction transistors with reduced base spreading resistance”,
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), Tu.P.BP7.

M. Nakajima, M. Kaneko, and T. Kimoto, “400℃ Operation of Normally-off n- and p-JFETs with a Side-Gate Structure Fabricated by Ion Implantation into a High-Purity Semi-Insulating SiC Substrate”(invited),
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), TH.01.01.

M. Kaneko, U. Grossner, and T. Kimoto, “SiC vertical-channel n- and p-JFETs fully fabricated by ion implantation”,
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), TH.01.02.

S. Yamashita and T. Kimoto, “Theoretical Analysis of Carrier Lifetimes in SiC by Using Rate Equations”,
Europ. Conf. on Silicon Carbide and Related Materials 2018 (Birmingham, UK, 2018), TH.03.05.

T. Maeda, T. Narita, H. Ueda, M. Kanechika, T. Uesugi, T. Kachi, T. Kimoto, M. Horita, and J. Suda, “Measurement of Avalanche Multiplication Factor in GaN p-n Junction Diode Using Sub-bandgap Light Absorption Due to Franz-Keldysh Effect”,
2018 Int. Conf. on Solid-State Devices and Materials (Tokyo, Japan, 2018), D-7-02.

Y. Nishi, H. Sasakura, and T. Kimoto, “Driving Force behind Reset Process in Pt/NiO/Pt Stack Cells”,
14th Int. Conf. on Atomically Controlled Surfaces, Interfaces and Nanostructures (Sendai, Japan, 2018), 22E24.

T. Maeda, T. Narita, H. Ueda, M. Kanechika, T. Uesugi, T. Kachi, T. Kimoto, M. Horita, and J. Suda, “Temperature Dependence of Avalanche Multiplication in GaN PN Diodes Measured by Light Absorption Due to Franz-Keldysh Effect”,
Int. Workshop on Nitride Semiconductors (Kanazawa, Japan, 2018), ED6-3.

T. Maeda, T. Narita, H. Ueda, M. Kanechika, T. Uesugi, T. Kachi, T. Kimoto, M. Horita, and J. Suda, “Shockley-Read-Hall Lifetime in Homoepitaxial p-GaN Extracted from the Recombination Current in GaN p-n Junction Diodes”,
Int. Workshop on Nitride Semiconductors (Kanazawa, Japan, 2018), CR10-5.

K. Kanegae, H. Fujikura, Y. Otoki, T. Konno, T. Yoshida, M. Horita, T. Kimoto, and J. Suda, “DLTS studies of quartz-free-HVPE-grown homoepitaxial n-type GaN”,
Int. Workshop on Nitride Semiconductors (Kanazawa, Japan, 2018), CR11-2.

M. Horita, T. Narita, T. Kachi, T. Uesugi, and J. Suda, “Deep levels introduced by electron beam irradiation in the energy range from 100 keV to 2 MeV in MOVPE-grown homoepitaxial n-type GaN”,
Int. Workshop on Nitride Semiconductors (Kanazawa, Japan, 2018), CR11-1.

K. Kanegae, T. Narita, K. Tomita, T. Kachi, T. Kimoto, M. Horita, and J. Suda, “Hole occupancy ratio of H1 trap in homoepitaxial n-type GaN under sub-bandgap light irradiation” (invited),
Int. Workshop on Nitride Semiconductors (Kanazawa, Japan, 2018), CR16-1.

Y. Yonezawa, K. Nakayama, R. Kosugi, S. Harada, K. Koseki, K. Sakamoto, T. Kimoto, and H. Okumura, “Progress in high and ultrahigh voltage silicon carbide device” (invited),
64th Int. Electron Device Meeting (IEDM2018), (San Francisco, USA, 2018), 19.3.

T. Maeda, T. Narita, H. Ueda, M. Kanechika, T. Uesugi, T. Kachi, T. Kimoto, M. Horita, and J. Suda,
“Parallel-Plane Breakdown Fields of 2.8-3.5 MV/cm in GaN-on-GaN p-n Junction Diodes with Double-Side-Depleted Shallow Bevel Termination”,
64th Int. Electron Device Meeting (IEDM2018), (San Francisco, USA, 2018), 30.1.

T. Miyatani, Y. Nishi, and T. Kimoto, “DC and AC electrical characteristics of Ta2O5-based ReRAM cells”,
31st Int. Microprocesses and Nanotechnology Conference (Sapporo Park Hotel, Sapporo, Japan, 2018), 16P-11-24.

T. Kimoto, “Fundamentals and future challenges of SiC power device material” (invited lecture), TIA Power Electronics Summer School (Tsukuba, 2018), II-V.

T. Kimoto, A. Iijima, S. Yamashita, and H. Niwa, “Defect electronics in SiC for high-voltage power devices” (invited),
4th Intensive Discussion on Growth of Nitride Semiconductors (Sendai, 2018), 3-1.

T. Kimoto, “SiC power devices: material and device technology” (plenary),
Int. Workshop on Silicon Carbide Material and Devices (Catania, 2018), 1.