International Journals

K. Mikami, K. Tachiki, M. Kaneko, and T. Kimoto,
“Insight into mobility improvement by the oxidation-minimizing process in SiC MOSFETs,”
IEEE Trans. Electron Devices, 71, 931 (2024).

R. Ishikawa, H. Tanaka, M. Kaneko, and T. Kimoto,
”Origin of hole mobility anisotropy in 4H-SiC,”
Journal of Applied Physics 135, 075704 (2024).

H. Fujii, M. Kaneko, and T. Kimoto,
“Generation of deep levels near the 4H-SiC surface by thermal oxidation,”
Appl. Phys. Express 17, 041004 (2024).

M. Kaneko, T. Matsuoka, and T. Kimoto,
“High electron mobility in heavily sulfur-doped 4H-SiC,”
J. Appl. Phys. 135, 205702 (2024).

K. Kuwahara, T. Kitawaki, M. Hara, M. Kaneko, and T. Kimoto,
“Formation of ohmic contacts on heavily Al⁺-implanted p-type SiC without an alloying process,”
Jpn. J. Appl. Phys. 63, 050903 (2024).

H. Fujii, M. Kaneko, and T. Kimoto,
“Depth profiles of deep levels generated in the tail region of Al ion implantation into n-type 4H-SiC,”
Jpn. J. Appl. Phys. 63, 061003 (2024).

K. Mikami, M. Kaneko, and T. Kimoto,
“High-Mobility 4H-SiC p-Channel MOSFETs on Nonpolar Faces,”
IEEE Electron Device Lett., 45, 1113 (2024).

Review Article

M. Hara, T. Kitawaki, H. Tanaka, M. Kaneko, and T. Kimoto,
“Tunneling current through non-alloyed metal/heavily-doped SiC interfaces,”
Materials Science in Semiconductor Processing 171, 108023 (2024).

H. Tanaka, T. Kimoto, and N. Mori,
“Theoretical study on high-field carrier transport and impact ionization
coefficients in 4H-SiC,”
Materials Science in Semiconductor Processing, 173, 108126 (2024).

International Presentations

T. Kimoto,
“SiC MOS Physics and Performance Improvement of SiC Power MOSFETs” (invited),
Japan-UK Joint Webinar in Semiconductor Research (Online, 2024), 2-2.

T. Kimoto,
“Silicon Carbide: the new frontier for power electronics” (invited),
Cambridge Colloquium on Power Semiconductor Devices 2024 (Cambridge, 2024).

T. Kimoto,
“Fundamentals of SiC Power Devices – Performance and Reliability” (invited lecture),
Short Course of The 36th Int. Sympo. on Power Semiconductor Devices and ICs (ISPSD 2024) (Bremen, 2024), 1.

M. Kaneko and T. Kimoto,
“SiC Complementary JFET Logic Gates: An Emerging Technology for High-Temperature Electronics,”
International Conference and Exhibition High Temperature Electronics Network (HiTEN2024) (Edinburgh, 2024), 03:00PM